अमूर्त

Performance Analysis of Forward Error Correction Codes used for Transmission of data considering Failures in Coder/Decoder Circuits

P.Ratna Kamala, Dr R.V.S.Satyanarayana

Reliable and efficient transmission of data over a wireless network has been an increasing demand for the past few years. Whereas, major concern is the control of errors and to obtain reliable reproduction of data .This is achieved by using a variety of error control codes which improves BER performance in digital communication systems and are important in wireless information networks. Performance of Error correcting codes for a complete system analysis includes finding the reliability of coding and decoding circuits as this plays a significant role in undetected errors. Error Control Codes used in this paper evaluate their performance by computing the probability of not correcting an error. In general, the fact that the coder and decoder circuitry can also fail is neglected. This paper explains that under certain circumstances [e.g., low bit error rate and low data transmission rates (bits/sec), variable message bits] the chip failure probabilities can actually dominate and eliminate the gains achieved with coding. Some of the Error correcting codes like parity bit code, Hamming code and Reed Solomon code for various message lengths and different code rates including the effect of coding & decoding circuits is analysed. Finally the improvement ratio is calculated between probability of not correcting error without coding and with coding for 3 codes. Results reveal that for lengthy messages & at low data rates reliability of coding circuitry is of major importance in determining overall system performance. Comparison curves for the 3 codes with respect to different Baud rate is also established for system design