अमूर्त

Performance Analysis of an Efficient Low Power NOC Router System Using Gray Encoding Techniques

S.Anusuyahdevi & Dr.S.Jayashri

Network-On-Chip (NOC) structure makes a fitting substitution for system on chip designs incorporating large number of processing cores. In network the main source of power dissipation is in the network on chip links. The dynamic power dissipation in links is major contributor to the power consumption in NOC. This effort investigsates the reduction of transition activity using gray coding schemes. Our advanced scheme does not require any change of the routers and link architecture. The future scheme uses the binary to gray conversion at the transmitter and gray to binary conversion at the receiver. An investigational result has shown the effectiveness of the proposed schemes, with respect of power dissipation and area overhead in the Network Interface (NI) as compared with data encoding.