अमूर्त

Implementation of Euclidian Geometry Low Density Parity Check (EG-LDPC) Codes for Error Detection by Using MLDD

B Ramanjaneya Reddy, O Homakesav

Nowadays, Error correction codes are commonly used to protect memories from so-called soft errors, which change the logical value of memory cells without damaging the circuit. As technology scales, memory devices become larger and more powerful error correction codes are needed. A method was recently proposed to accelerate a serial implementation of majority logic decoding of EG-LDPC codes. The method is to use the first iterations of majority logic decoding to detect if the word being decoded contains errors. If there are no errors, then decoding can be stopped without completing the remaining iterations, therefore greatly reducing the decoding time. For a code with block length, majority logic decoding (when implemented serially) requires iterations, so that as the code size grows, so does the decoding time. In the proposed approach, only the first three iterations are used to detect errors, there by achieving a large speed increase when is large. In it was shown that for EG-LDPC codes, all error combinations of up to five errors can be detected in the first three iterations. So in the proposed fault detection method significantly reduce the memory access time by using Majority logic decoder/detector.