अमूर्त

FPGA Implementation of Selective Eigen Background Using Background Subtraction Algorithm in Crowded Scenes

S.Soomiya Begum, K.Lokeswara Reddy

In this paper a new background subtraction algorithm was developed to detect moving objects from a stable system in which visual surveillance plays a major role. However background subtraction in crowded scenes remains challenging especially when a large number of foreground objects move slowly. Among all existing algorithms it was chosen because of low computational complexity which is the major parameter of time in VLSI. The concept of the background subtraction is to subtract the current image with respect to the reference image and compare it with to the certain threshold values. Here we have written the core processor Micro blaze is designed in VHDL (VHSIC hardware description language), implemented using XILINX ISE 8.1 Design suite the algorithm is written in system C Language and tested in SPARTAN-3 FPGA kit by interfacing a test circuit with the PC using the RS232 cable. The test results are seen to be satisfactory.