अमूर्त

FPGA Implementation of IEEE 802.15.3c Transceiver

Jagannatha.V, G.Jyothi, Dr.M.Z.Kurian

This proposal presents the implementation of the transmitter, receiver and the Viterbi decoder compatible for IEEE 802.15.3c transceiver, as a part of wireless High Definition video transceiver to be integrated in an FPGA. These blocks are implemented on SPARTAN-3 FPGA.