अमूर्त

Clustering Based Multi Flip Flop Merging Using Agglomerative Clustering Algorithm

T.Rathidevi, R.Premkumar

Based on the elimination feature of redundant inverters in merging 1-bit flip-flops into multibit flip-flops, gives reduction of wired length and this result in reduction of power consumption.. With the growing popularity of portable devices, power reduction has become a popular design goal for advanced design application. Multi-bit flip-flop is an effective powersaving implementation methodology by merging singlebit flip-flops in the design. Using multi-bit flip-flops can reduce clock dynamic power and the total flip-flop area effectively.we propose agglomerative clustering algorithm to find the nearest clustering of flip flops for merging the flip flops. This algorithm finds the clusters of flip flop and finally combine FFs to reduce the wire length.